Intel Reveals Details of Intel Xeon E5 Processor and Teraflop-capable Many Integrated Core Co-Processor

Demonstrations and revelations presented at SC11.

Demonstrations and revelations presented at SC11.

By DE Editors

Intel Corporation has revealed details about the company’s Intel Xeon processor-based and Intel Many Integrated Core (Intel MIC)-based platforms designed for high-performance computing (HPC). The company also outlined new investments in research and development that it says will lead the industry to Exascale performance by 2018.

Rajeeb Hazra, general manager of Technical Computing, Intel Datacenter and Connected Systems Group, said that the Intel Xeon processor E5 family is the world’s first server processor to support full integration of the PCI Express 3.0 specification. PCIe 3.0 is estimated to double the interconnect bandwidth over the PCIe 2.0 specification while enabling lower power and higher density server implementations.

According to the company, early-performance benchmarks revealed that the Intel Xeon E5 delivers up to 2.1 times more performance in raw FLOPS (Floating Point Operations Per Second as measured by Linpack) and up to 70% more performance using real-HPC workloads compared to the previous generation of Intel Xeon 5600 series processors.

The first presentation of the first silicon of “Knights Corner” co-processor showed that Intel architecture is capable of delivering more than 1 TFLOPs of double precision floating point performance (as measured by the Double-precision, General Matrix-Matrix multiplication benchmark—DGEMM). This was the first demonstration of a single processing chip capable of achieving such a performance level.

One of the benefits of Intel MIC architecture is the ability to run existing applications without the need to port the code to a new programming environment. This will allow scientists to use both CPU and co-processor performance simultaneously with existing x86 based applications, dramatically saving time, cost and resources that would otherwise be needed to rewrite them to alternative proprietary languages.

For more information, visit Intel Corporation

Sources: Press materials received from the company and additional information gleaned from the company’s website.

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DE Editors

DE’s editors contribute news and new product announcements to Digital Engineering.
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