Delivering on the Potential of Multiple Cores for HPC

By Peter Varhol

 

Two dual-core Intel processor systems sit on my work table. Yet for the vast majority of applications available today, this kind of computing power is not nearly as efficient as it could be because almost no commercial applications can divide up their workloads to execute in parallel.

  One of the most difficult problems faced by the computing industry is writing software that can effectively use multiple processor cores. You must understand the application intimately to know where the opportunities for separate code streams to run independently exist and to make detailed changes to the code in those areas so it will run on different cores without causing synchronization problems. And even then the code can only be run on that specific processor architecture.

  Mitrionics AB (mitrionics.com) of Sweden has a piece of the answer to this puzzle. While it doesn’t by itself parallelize code, the company’s Mitrion-C is a language that enables developers to easily parallelize code, and to port that code to other processors.

  According to Mitrionics’ Co-Founder and Stefan Möhl, the inability to fully use more than a single core has dire implications for our information society. “Our computing practices are built upon the foundation provided by Moore’s Law,” he explains. “If Moore’s Law no longer holds, because software can’t take advantage of increased computing power, our information society will no longer be able to advance at the rate of the past.”

  Technology—and the universe it serves—takes advantage of  Intel Cofounder Gordon Moore’s famous observation that computing power doubles every 18 months, by building faster computers and designing more complex software.

  Möhl says that Mitrion-C is not an ANSI C, but rather a completely new language optimized for parallel compilation and execution. He says it uses C syntax, but is as different from C as is Java. Mitrion-C was originally developed to run on processors encoded into field-programmable gate arrays (FPGA) to be able to get the most out of these embedded processors.

  More recently, Mitrionics has branched out. At Supercomputing ’09 in November, the company announced a proof-of-concept compiler to demonstrate that a Mitrion-C program will automatically scale through parallel execution, not only on FPGAs, but also on multicore systems and clusters, without changing the source code between theses very diverse architectures.

  In particular, the company has tested Mitrion-C with multicore systems and clusters, and has determined that no code changes are needed to achieve parallel operation. Möhl anticipates that the same will be true with graphics processing units (GPUs). He notes that these processors and architectures are actually less highly parallel than FPGAs, and require that the compiler sequentialize. “To run Mitrion-C code on other less parallel platforms, you need to sequentialize the code, rather than parallelize it. The problem of automatic parallelization has turned out to be very hard. In comparison, sequentialization is quite easy.”

  To take advantage of the capabilities of Mitrion-C, developers first have to learn and practice the language. The similarity to the C language makes it relatively easy to learn,  and once developers get the hang of it, they can write applications that are both highly parallel and are portable to several different parallel architectures. Engineers benefit by having design and simulation applications run more quickly, and across more computing platforms.

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Contributing Editor Peter Varhol covers the HPC and IT beat for DE. His expertise is software development, math systems, and systems management. You can reach him at [email protected].